1. Field of the Invention
The present invention is directed toward data transfer methods between a processor and input/output (I/O) devices such as facsimile modems. The invention particularly relates to computer interrupt technology, and more specifically to a new interrupt hardware and software architecture for multiple I/O devices including multi-line facsimile boards.
2. Description of the Prior Art
Computers are increasingly used to service multiple I/O devices, such as facsimile modems, keyboards, sensors and other computers or processors. However, a major problem that limits the expanding use of multiple computer-based I/O devices is that the computer has limited interrupt inputs and limited communication ports. A computer readily supports two serial ports, with the hardware generally providing for up to four serial ports (COM 1 through COM 4). However, exceeding four serial ports currently presents problems. For example, in order to run 24 or 30 facsimile channels (lines) in a computer, it is not possible to simply architect a COM 1 through COM 30 solution.
The foregoing problem is particularly accentuated in the design of facsimile servers, multi-line fax-on-demand systems, facsimile store-and-forward node systems, facsimile packet-switched node systems, and facsimile broadcast systems, which need multiple high-speed facsimile channels to simultaneously service multiple subscribers in a computer system. For instance, in a facsimile packet-switched node, data from a plurality of facsimile machines are sent together over a common channel, and therefore multiple modems are needed in the node to service multiple subscribers.
High-speed facsimile modem such as Class 1 modem communicates to the host computer by way of an interrupt driven, with each interrupt occurring on a character-by-character basis. Since most faxes go out at high-speed such as 9,600 BPS or faster, the serial port would have to run at 19,200 BPS in order to feed the facsimile modem fast enough. At this speed, there is an interrupt required every 400-500 used. As a result, if for instance the computer supports ten facsimile modems, the computer will be interrupted every 40 to 50 used in order to read in the next character to the serial port, thus causing interrupt overload. Interrupt overload is highly undesirable since it degrades the computer general performance by forcing it away from other tasks to service an interrupt and then returning to continue the previous task.
The intelligent facsimile boards, such as GammaFax (a registered trademark of Dialogic), TR114 series (a registered trademark of Brooktrout), and SatisFAXtion series (a registered trademark of Pure Data), are developed to resolve above problems. For each facsimile channel of the intelligent facsimile board, a processor is dedicated to service a high-speed facsimile modem. So, when the board supports multi facsimile channels, it has to include multi processors, which renders that board expensive and relatively large in size, with complicated hardware designs. For example, a GammaFax CP-6/SC board includes six facsimile modems, six 20 MHz microprocessors, six 64 KB memory and six system bus control circuits.
Even if the computers were dedicated for the facsimile system only, most multi-line higt-speed facsimile systems still have to be established by using the intelligent facsimile board because of the limited interrupt inputs and the interrupt overload of the computer. The facsimile system based on such facsimile boards is expensive and requires more technologic maintenance, because such facsimile boards are complicated. Though the speed of the computer is becoming faster and faster, such as from the 8086 PC to the present Pentium 5 PC, the computer still tends to support one high-speed facsimile modem only such as Class 1 modem because of conventional interrupt method.
In general, an I/O device has an Interrupt Request output and status bits. When the I/O device has a request to input or output data, it sets the status bits and/or interrupts the computer by means of the Interrupt Request output. The computer responds to the I/O device within a period Ti after the I/O device signals the request, in order to prevent data from overrunning. For example, when a facsimile modem is receiving data, if the computer does not timely read the received data byte from the data buffer of the modem within the period Ti, the modem will continue to write the subsequently new received data byte to the data buffer and data might be lost. On the other hand, when a facsimile modem is transmitting, if the computer does not write the next transmitted data byte to the modem within the period Ti, the modem will not have the subsequent data byte on time, and it will erroneously transmit the data.
It should be noted that the I/O device such as higt-speed facsimile modem may very frequently and very randomly or at any time signify the interrupt request, however, when the I/O device such as facsimile modem signifies a request, it will allow a short period for the computer to respond, and if the computer can respond the request within the period, the computer will service the I/O device correctly.
FIG. 3 shows a conventional computer (CPU) 1 that services multi facsimile modems 2, 3 and 5. An interrupt requests IQR 2A, IQR 3A and IRQ 5A of the facsimile modems 2, 3 and 5, respectively, are connected to a programmable interrupt controller (PIC) 4. It should be noted that this conventional design uses multiple interrupt request inputs of the computer 1. After the facsimile modems begin communication, when any facsimile modem 2, 3 or 5 requests a data byte, it sends an interrupt request signal to PIC 4 by its IRQ output 2A, 3A or 5A. It should also be noted that this conventional design enables the interrupt request to the computer 1 from the multi facsimile modems 2, 3 or 5, as opposed to disabling the interrupt requests to the computer 1 from the multi facsimile modems 2, 3 or 5 (as performed by the present invention). Then, the PIC 4 responds to the request (IRQ) of the facsimile modems 2, 3 or 5, and interrupts the CPU 1 by the IRQ output of the PIC 4. In response to the interrupt request IRQ of the PIC 4, CPU 1 goes to interrupt service and transfers a data byte for the facsimile modems 2, 3 or 5. In the method, if any facsimile modem has a request, it will independently interrupt the CPU 1, and the CPU 1 will execute an interrupt routine for the facsimile modem only, rather than the CPU executing an interrupt service to check and service the modems 2, 3 or 5 as performed by the present invention.